FIGS. 12 to 16 are diagrams for explaining effects of a quantum wire and a quantum box recited in IEEE Journal of Quantum Electronics, Vol.QE-22, No.9, September 1986 p.1915.about.1921.
FIG. 12 is a perspective view illustrating an active layer in bulk. In the figure, reference numeral 91 designates a bulk layer comprising GaAs having a thickness of 20 nm or more. Reference numeral 92 designates cladding layers comprising Al.sub.0.2 Ga.sub.0.8 As disposed so that the GaAs bulk layer 91 is between the cladding layers 92. FIG. 13 is a perspective view illustrating a quantum thin film active layer. In the figure, reference numeral 93 designates a quantum thin film comprising GaAs having a thickness of 10 nm. FIG. 14 is a perspective view illustrating a quantum wire. In the figure, reference numeral 94 designates a quantum wire comprising GaAs having a thickness of 10 nm and a width of 10 nm. FIG. 15 is a perspective view illustrating a quantum box. In the figure, reference numeral 95 designates a quantum box comprising GaAs having a thickness of 10 nm, a width of 10 nm, and a length of 10 nm. FIG. 16 is a graph representing quantum effects which are obtained when the bulk layer 91, the quantum thin film 93, the quantum wire 94, and the quantum box 95 are applied to a semiconductor laser. The abscissa represents injected carrier concentration and the ordinate represents the obtained maximum gain.
A description is given of an operation and a principle of these lasers. The active layer serving as a light emitting region of a semiconductor laser is surrounded by materials having a larger energy band gap than that of the active layer, whereby carriers injected into the active layer are efficiently confined in the active layer. In the description here, it is assumed that there is about 0.26 eV difference in the energy band gap between the active layer and the materials having a larger energy band gap than that of the active layer. FIG. 12 shows a bulk active layer 91 that has been widely employed and when the bulk active layer 91 is replaced by a quantum thin film 93 having a thickness of 20 nm or below as shown in FIG. 13, a large gain is obtained even when the injected carrier concentration in the active layer is the same. One which is obtained by applying such quantum effect also to the width direction is a quantum wire 94 shown in FIG. 14, and one which is obtained by applying the same further to the length direction is a quantum box 95 shown in FIG. 15. FIG. 16 is a diagram showing the calculated values of the maximum gains of the laser relative to the carrier concentrations in these respective active layer structures. As is found from the figure, at a carrier concentration of 3.about.4.times.10.sup.18 cm.sup.-3, the gain increases in the order of the bulk 91, the quantum thin film 93, the quantum wire 94, and the quantum box 95.
Because the oscillation threshold current of a laser decreases as the obtained gain increases, the threshold current decreases in order of the bulk 91, the quantum thin film 93, the quantum wire 94, and the quantum box 95 in the range of the above-described carrier concentration.
At present, while semiconductor lasers employing the bulk active layer 91 and the quantum thin film 93 have been put into practice, the quantum wire 94 and the quantum box 95 have not been put into practice in semiconductor lasers due to difficulty in their fabrication. However, studies for the quantum wire 94 are being actively advanced and a semiconductor laser employing the same has been fabricated experimentally.
FIG. 17 is a diagram illustrating a structure of a prior art quantum wire laser recited in, for example, an article by Professor Tada of Tokyo University, "A Quantum Wire Structure Laser Employing OMVPE" (hereinafter referred to as reference (1)). In the figure, reference numeral 201 designates an n type InP substrate. Reference numeral 202 designates an n type InP buffer layer, numeral 203 designates an n type GaInAsP waveguide layer, numeral 204 designates an n type InP barrier layer, numeral 205 designates an undoped GaInAsP quantum well layer, numeral 206 designates a p type InP layer, numeral 207 designates a p type InP cladding layer, numeral 208 designates a p.sup.+ type GaInAsP cap layer, numeral 209 designates a SiO.sub.2 film, numeral 210 designates a p side electrode comprising Au/Zn, and numeral 211 designates an n side electrode comprising Au/Sn.
FIGS. 18(a) to 18(c) are diagrams for explaining the fabrication process of the quantum wire laser shown in FIG. 17. In the figures, the same numerals are used to designate the same or corresponding portions in FIG. 17.
A fabrication process of a quantum wire laser shown in FIG. 17 will be described in accordance with FIGS. 18(a) to 18(c). First of all, an n type InP buffer layer 202 having a carrier concentration of 2.times.10.sup.18 cm.sup.-3 and a layer thickness of 2 .mu.m, an n type GaInAsP waveguide layer 203 having a composition producing a light of 1.3 .mu.m wavelength, a carrier concentration of 2.times.10.sup.18 cm.sup.-3, and a layer thickness of about 50 nm, an n type InP barrier layer 204 having a carrier concentration of 2.times.10.sup.18 cm.sup.-3 and a layer thickness of 20 nm, an undoped GaInAsP quantum well layer 205 having a composition producing light of 1.56 .mu.m wavelength and a layer thickness of about 30 nm, and a p type InP layer 206 having a carrier concentration of 5.times.10.sup.17 cm.sup.-3 and a layer thickness of 20 nm are subsequently crystalline grown by OMVPE (organic metal vapor phase epitaxy) on an n type InP substrate 201 (FIG. 18(a)).
Such a single layer quantum well structure is subjected to multi-dimensionalization of an active layer that is carried out employing an interference exposure and wet etching. More particularly, employing a resist pattern having a period of about 220 nm in an &lt;011&gt; direction that is formed by interference exposure employing a He-Cd laser beam and a mask, wet etching employing HBr:HNO.sub.3 :H.sub.2 O solution is carried out to form a grating configuration having a depth of about 60 nm (FIG. 18(b)).
After removing the resist, a regrowth of a p type InP cladding layer 207 having a carrier concentration of 5.times.10.sup.17 cm.sup.-3 and a layer thickness of 2 .mu.m and a p.sup.+ type GaInAsP cap layer 208 is carried out at a relatively low temperature of 600.degree. C. or so by OMVPE (FIG. 18(c)), and further a process of electrode formation or the like is carried out to complete the quantum wire laser shown in FIG. 17.
FIG. 19 is a cross sectional structural view illustrating a structure of another prior art quantum wire laser disclosed in, for example, "single quantum wire semiconductor lasers" by E. Kapon, et al., Appl. Phys. Lett. 55(26), 25 Dec. (1989), pp2715-2717 (hereinafter referred to as reference (2)).
In the figure, reference numeral 101 designates an n type GaAs substrate having a (100) surface. Reference numeral 109 designates a V-shaped groove formed in the [011] direction on the surface of the substrate 101 having a bottom 109a and sloped surfaces 109b. An n type Al.sub.0.5 Ga.sub.0.5 As lower cladding layer 121 having a thickness of 1.25 .mu.m is disposed on the substrate 101. An n type Al.sub.x Ga.sub.1-x As lower graded cladding layer 122 0.2 .mu.m thick is disposed on the lower cladding layer 121. Layer 122 has an Al composition x which is equal to 0.5 at the side in contact with the lower cladding layer 121 and gradually decreases toward the upper layer and is equal to 0.2 at the side in contact with the upper cladding layer. A quantum thin film active layer 123 comprising GaAs 7 nm thick is disposed on the lower graded cladding layer 122, and it has a region 123a on the V-shaped groove bottom 109a and regions 123b on the V-shaped sloped surfaces 109b. A p type Al.sub.x Ga.sub.1-x As upper graded cladding layer 124 0.2 .mu.m thick is disposed on the active layer 123 and it has an Al composition which is equal to 0.2 at the side contacting the active layer 123 and gradually increases toward upper layer up to 0.5. A p type Al.sub.0.5 Ga.sub.0.5 As upper cladding layer 125 1.25 .mu.m thick is disposed on the upper graded cladding layer 124 and a p type GaAs cap layer 105 0.2 .mu.m thick is disposed on the upper cladding layer 125. Reference numeral 106 designates a current blocking region formed by proton injection, reference numeral 107 designates a p side electrode and reference numeral 108 designates an n side electrode.
This prior art quantum wire semiconductor laser is fabricated as follows. First of all, a stripe V-shaped groove 109 extending in the [011] direction is formed on the (100) n type GaAs substrate 101 employing H.sub.2 SO.sub.4 :H.sub.2 O.sub.2 (30 mole %):H.sub.2 O (volume ratio 1:8:40) as an etching solution. The aperture width and depth of the groove are both approximately 5 .mu.m.
Subsequently, in the substrate 101 on which the groove 109 is formed, MOCVD (Metal Organic Chemical Vapor Deposition) is carried out to successively laminate an AlGaAs lower cladding layer 121, an AlGaAs lower graded cladding layer 122, a GaAs quantum thin film active layer 123, an AlGaAs upper graded cladding layer 124, an AlGaAs cladding layer 125, and a GaAs cap layer 105. When such a series of crystal growths are carried out, respective AlGaAs layers would grow relatively thick on the sloped surface 109b of the V groove 109 leaving a configuration of the V groove 109 while the GaAs quantum thin film active layer 123 would grow relatively thick on the V groove bottom part 109a, thereby forming a crescent moon shaped region 123a 10 nm thick. On the other hand, the active layer 123b on the groove sloped surface 109b is thin, about 7 nm, and its energy band gap is larger than the crescent moon shaped active layer 123a due to the quantum effect. Accordingly, the crescent moon shaped active layer 123a forms a quantum wire structure which is between upper and lower graded cladding layers 122 and 124 which comprise materials having a larger energy band gap than that of the material constituting the active layer 123 in the up-and-down direction. The quantum wire structure is between active layers 123b having a larger energy band gap than that of the crescent moon shaped active layer 123a because of a difference in layer thickness in the transverse direction.
After the above-described crystal growth process, protons are implanted from the surface of the cap layer 105 into a region other than the region confronting the V groove bottom part 109a, thereby forming a current blocking region 106. Thereafter, a p side electrode 107 is formed on the cap layer 105 and an n side electrode 108 is formed on the rear surface of the substrate 101, thereby completing a semiconductor laser shown in FIG. 18.
As for the laser operation, when a current is injected with a negative electrode of a current supply connected to the n side electrode 108 and a positive electrode of a current source to the p side electrode 107, a current passes through the region on the bottom part 109a of the V groove where the current blocking region 106 is not present and is injected into the quantum wire 123a, thereby producing a laser oscillation.
FIGS. 20(a) to 20(c) illustrate processes of a prior art fabricating method of a quantum wire recited in "Patterning and overgrowth of nanostructure quantum well wire arrays by LP-MOVPE" by N. H. Karam, et al., Journal of Crystal Growth 107 (1991) 591-597, North-Holland (hereinafter referred to as reference (3)). In the figures, reference numeral 301 designates a GaAs wafer. Reference numeral 302 designates a first AlGaAs layer crystalline grown on the GaAs wafer 301. Reference numeral 303 designates a GaAs layer crystalline grown on the first AlGaAs layer 302. Reference numeral 304 designates a V groove. Reference numeral 305 designates a second AlGaAs layer crystalline grown by low pressure metal organic vapor phase epitaxy (LP-MOVPE).
In this prior art example, employing X-ray nanolithography patterning and overgrowth employing LP-MOVPE technique, a GaAs quantum well wire (QWW) array having a horizontal dimension in a range of 10 to 70 nm and a period of 200 nm, i.e., of nm scale is fabricated.
A description is given of this prior art fabricating method of a quantum wire recited in reference (3). First of all, as shown in FIG. 20(a), a GaAs film 303 5 to 20 nm thick is deposited on the GaAs substrate 301 on which the first AlGaAs layer 302 is present. The wafer is thereafter patterned by photolithography employing an X-ray nanolithography technique, it is etched with a NH.sub.4 OH:H.sub.2 O.sub.2 :H.sub.2 O solution which etches GaAs and AlGaAs at the same etching rate, whereby a GaAs wire array 303a having a wire width of 60 to 80 nm and V grooves 304 reaching within the AlGaAs layer and having a period of 200 nm are formed as shown in FIG. 20(b). Subsequently, the wafer is cleaned and it is installed in an MOCVD reactor, and a second AlGaAs layer 305 then is crystalline grown so as to bury the V grooves 304 and GaAs wire array 303a, thereby completing a quantum wire structure shown in FIG. 20(c).
FIGS. 21(a) and 21(b) illustrate another prior art fabricating method of a quantum wire recited in reference (3). In the figures, reference numeral 401 designates a GaAs wafer, numeral 402 designates a V groove formed in the GaAs wafer 401. Reference numeral 403 designates a first AlGaAs layer, numeral 404 designates a GaAs quantum wire, and numeral 405 designates a second AlGaAs layer.
First of all, the GaAs wafer 401 is patterned by the same method as the patterning method employed in the fabricating method shown in FIG. 20, whereby a saw-tooth wave structure having a period of 200 nm is formed (FIG. 21(a)). Here, the depth of the V groove 402 is typically in a range of 40 to 60 nm, and this is determined by the groove width and the (111)A surface having a small etching rate. Subsequently, the wafer is cleaned and placed into a reaction furnace, and as shown in FIG. 21(b), the first AlGaAs layer 403, the GaAs quantum wire 404, and the second AlGaAs layer 405 are successively crystalline grown. Here, the GaAs layer is crystalline grown only in the V groove that is generated at the surface of the first AlGaAs layer 403 following the configuration of the V groove 402 formed in the substrate 401, whereby a quantum wire structure in which the GaAs layer 404 is surrounded by the first AlGaAs layer 403 and the second AlGaAs layer 405 is obtained. The size of the quantum wire fabricated is 15 nm/side (width of about 30 nm), and in this prior art a quantum wire structure integrating quantum wires at a period of approximately 200 nm is realized.
FIGS. 22(a) to 22(d) show process steps of a prior art fabricating method of a quantum wire recited in, "InGaAs/InP quantum wires selectively grown by chemical beam epitaxy", by Toshio Nishida, et al., Journal of Crystal Growth 132 (1993) 91-98, North-Holland (hereinafter referred to as reference (4)). In the figures, reference numeral 501 designates an n type InP substrate having a (001) surface. Reference numeral 502 designates a SiO.sub.2 pattern formed on the surface of the substrate 501. Reference numeral 503 designates an InP buffer layer crystalline grown on the surface of the substrate 501 at an aperture portion of the SiO.sub.2 pattern 502. Reference numeral 504 designates an InGaAs well layer crystalline grown on the InP buffer layer 503. Reference numeral 505 designates an InP cap layer crystalline grown so as to cover the InGaAs well layer 504.
The prior art fabricating method of a quantum wire recited in this article forms a fine pattern InGaAs quantum wire utilizing electron beam (EB) lithography and the fact that InGaAs is not grown on (111)B surface of n type InP by chemical beam epitaxy (CBE) growth.
A description is given of this prior art fabricating method of a quantum wire recited in the reference (4). First of all, as a mask material for the selective growth, an SiO.sub.2 film deposited by RF magnetron sputtering is employed. After depositing the SiO.sub.2 film on an n type InP substrate 501 containing Sn and having a (001) surface, EB exposure resist is spin coated on the SiO.sub.2 film. The respective thicknesses of the SiO.sub.2 film and the resist are respectively 50-100 nm and 170 nm. Next, a grating pattern along the [110] direction is exposed by EB exposure technique. The developed resist pattern is transferred onto the SiO.sub.2 by RIE employing C.sub.2 F.sub.6, the resist is removed, and the substrate is cleaned with concentrated sulfuric acid, whereby a substrate 501 having a SiO.sub.2 pattern 502 formed on its surface is obtained as shown in FIG. 22(a).
Thereafter, as shown in FIGS. 22(b) to 22(d), on the substrate 501 an InP buffer layer 503, an InGaAs single quantum well layer 504 and an InP cap layer 505 are successively crystalline grown by CBE. The source materials are trimethylindium (TMI), triethylgalium (TEG), phosphine (PH.sub.3), and arsine (AsH.sub.3). The growth temperatures are 515.degree. C. for InP and 520.degree. C. for InGaAs at a pressure of 10.sup.-2 Pa.
As shown in FIG. 22(b), a {111}B surface appears on both side surfaces of the InP buffer layer 503 that is grown along the [110] direction. Further, as shown in FIG. 22(c), the surface growth of InGaAs single quantum well layer 504 onto the {111} B surface is really slow relative to the growth onto the (001) surface. By this difference in growth speed, it is possible to realize an InGaAs quantum well layer that is effectively surrounded by both of an InP buffer layer and a cap layer as shown in FIG. 22(d), and the width of the InGaAs well can be made still smaller than the width of the opening. In the reference, an InGaAs well of 55 nm width is formed at the opening of 110 nm width.
FIGS. 23(a) to 23(e) show another prior art fabricating method of a quantum wire structure or a quantum box structure recited in, for example, Japanese Published Patent Application No. Hei. 2-163928. In the figures, reference numeral 601 designates a GaAs substrate, numeral 602 designates a SiO.sub.2 film disposed on the substrate 601, numeral 603 designates an opening provided in the SiO.sub.2 film 602. Reference numeral 604 designates a GaAs buffer layer, numeral 605 designates a first AlGaAs layer, numeral 606 designates a GaAs layer, and numeral 607 designates a second AlGaAs layer.
A description is given of the fabrication process of this prior art example. First of all, as shown in FIG. 23(a), a SiO.sub.2 film 602 is formed covering the (100) surface of the GaAs substrate 601, and apertures 603 between the SiO.sub.2 film 602' of width d1 are formed. When a quantum wire is to be formed, the apertures 603 have rectangular configurations between the stripe-shaped SiO.sub.2 film 602' of width d1, while when a quantum box is to be formed, the apertures 603 have rectangular configurations having the same center, surrounding the SiO.sub.2 film 602' of a square configuration having a length of d1 for one edge.
On the GaAs substrate 601 on which the above-described processing is performed, a GaAs buffer layer 604 is crystalline grown by MOVPE. In this crystal growth, there is an anisotropy in the growth speed, i.e., the growth is faster on the (100) surface and the growth hardly occur in the (111)B surface. Accordingly, when a crystal growth by MOVPE is carried out selectively on the (100) surface having a window as shown in FIG. 23(a), crystal growth is stopped when a projection having a triangle cross section surrounded by the (111)B surface is formed as shown in FIG. 23(b), thereby forming a hollow of a quasi V shaped cross section surrounded by the projections.
Next, the SiO.sub.2 films 602 and 602' are removed and a first AlGaAs layer 605 is grown by atomic layer epitaxy (ALE). Since the ALE supplies materials for respective constitutional elements to grow atomic layers one by one and presents no anisotropy, the crystal growth proceeds on (111)B surface as well as on (100) surface, and as shown in FIG. 23(c), the first AlGaAs layer 605 is grown on the entire surface of the wafer. The (100) surface at the bottom of the quasi V shaped hollow having initially a width of d1 reduces its width with the growth of the first AlGaAs layer 605, and as shown in the figure, the first AlGaAs layer 605 is grown until the width becomes d2. This width d2 becomes the width of a quantum wire or a quantum box.
Subsequently, a GaAs layer is formed by deposition to a thickness of several atomic layers by MOVPE. This thickness is set to a value that is appropriate for confinement of carriers and is controlled by the speed and time of supplying materials. Because the crystal growth by MOVPE is anisotropic and the growth speed of the first AlGaAs layer 605 formed by ALE on the (111) B surface is almost 0, the crystal growth only proceeds on the (100) surface, and as shown in FIG. 23(d), a GaAs layer 606 of a width d2 is formed at the bottom of the quasi V shaped hollow.
Thereafter, a second AlGaAs layer 607 is grown again by ALE. Because this second AlGaAs layer 607 is grown isotropically, it envelops the GaAs layer 606 as shown in FIG. 23(e), thereby obtaining a structure as a quantum wire or a quantum box.
FIGS. 24(a) to 24(d) are diagrams for illustrating a prior art fabricating method of a semiconductor laser element having a diffraction grating (DFB laser) recited in, for example, Japanese Published Patent Application No. Hei. 3-16288. In the figures, reference numeral 701 designates an n type GaAs substrate having a (001) surface. Reference numeral 702 designates an n type GaAs buffer layer. Reference numeral 703 designates an n type AlGaInP cladding layer. Reference numeral 704 designates an undoped AlGaInP active layer. Reference numeral 705 designates a first p type AlGaInP cladding layer. Reference numeral 706 designates a p type GaInP diffraction grating formation layer. Reference numeral 707 designates a second p type AlGaInP cladding layer. Reference numeral 708 designates a p type GaInP layer. Reference numeral 709 designates a p type GaAs contact layer. Reference numeral 711 designates a p side electrode and numeral 712 designates an n side electrode. Reference numeral 713 designates a SiO.sub.2 film and numeral 714 designates a resist.
A description is given of a fabrication process of this semiconductor laser. First of all, on an n type GaAs substrate 701 having a (001) surface, an n type GaAs buffer layer 702 having a thickness of 0.5 .mu.m and an impurity concentration of 1.times.10.sup.18 cm.sup.-3 an n type (Al.sub.x Ga.sub.1-x).sub.0.51 In.sub.0.49 P cladding layer 703 having a thickness of 0.8 to 1.0 .mu.m and an impurity concentration of 1.times.10.sup.17 cm.sup.-3, and Al composition x of 0.6, an undoped (Al.sub.y Ga.sub.1-y).sub.0.51 In.sub.0.49 P active layer 704 having a thickness of 0.04 to 0.08 .mu.m and Al composition of y (0.ltoreq.y&lt;0.1), and a first p type (Al.sub.x Ga.sub.1-x).sub.0.51 In.sub.0.49 P cladding layer 705 having a thickness of 0.2 to 0.8 .mu.m, an impurity concentration of 7.times.10.sup.17 cm.sup.-3, and Al composition x=0.6 are successively epitaxially grown by MOCVD. Next, a SiO.sub.2 film 713 of 0.1 to 0.2 .mu.m thickness is evaporated on the p type cladding layer 705, and after depositing photoresist 714 thereon, a patterning of the resist 714 at a period of .LAMBDA.=280-290 nm is carried out by the interference exposure method employing a He-Cd laser of wavelength 325 nm (FIG. 24(a)).
Thereafter, employing the resist 714 as a mask, the SiO.sub.2 film 713 is etched with a hydrofluoric acid solution, thereby obtaining a diffraction grating pattern comprising the SiO.sub.2 film 713 as shown in FIG. 24(b).
Next, a p type Ga.sub.0.51 In.sub.0.49 P diffraction grating formation layer 706 having a thickness of 60 to 120 nm, an impurity concentration of 1.times.10.sup.18 to 1.times.10.sup.19 cm.sup.-3 is selectively grown by MOCVD method, thereby forming a periodic diffraction grating in a trapezoidal configuration as shown in FIG. 24(c). Thereafter, the SiO.sub.2 film 713 is etched and removed, and the second p type (Al.sub.x Ga.sub.1-x).sub.0.51 In.sub.0.49 P cladding layer 707 having a thickness of 0.5 to 0.8 .mu.m, an impurity concentration of 7.times.10.sup.17 cm.sup.-3, and Al composition x=0.6, a p type Ga.sub.0.51 In.sub.0.49 P layer 708 having a thickness of 0.05 to 0.1 .mu.m and an impurity concentration of 1.about.3.times.10.sup.18 cm.sup.-3 and a p type GaAs contact layer 709 having a thickness of 1.0 to 2.0 .mu.m and an impurity concentration of 5.times.10.sup.18 to 5.times.10.sup. 19 cm.sup.-3 are grown by MOCVD. Thereafter, other required processes including forming a p side electrode 711 on the contact layer 709 and an n side electrode 712 on the rear surface of the substrate 701, are carried out to complete the DFB laser shown in FIG. 24(d).
According to this prior art example, the configuration of the diffraction grating can be determined only by the crystal growth conditions without employing etching, whereby a semiconductor laser element having a diffraction grating can be fabricated with high reproducibility. In addition, in this prior art example, it is recited that a semiconductor laser element which can realize a dynamic vertical single mode at a high speed modulation of 10 GHz or above can be fabricated by forming a .lambda./4 shifted diffraction grating pattern shifting the phase at the element central portion by .lambda./4 during the patterning of the SiO.sub.2 film.
The prior art fabricating method of a quantum wire recited in the reference (1) uses a single layer quantum well structure that is epitaxially grown so as to make the same in a fine wire configuration employing etching. Thereby, it has a problem that the fine wires are damaged by the etching. Particularly, there was a problem that the damage is noticeable when formation of wires is carried out by dry etching that is superior in the controllability in the width direction to the wet etching. In addition, since after a single layer quantum well structure is crystalline grown, it is taken out from the furnace, and fine wire processing by etching is executed to the wafer, and regrowth is again carried out in the growth furnace, there was a problem in that the fine wires could be changed by the reheating during the regrowth.
In addition, in the prior art fabricating method of a quantum wire recited in the reference (2), although it has no problem that the fine wires should be damaged by etching and the fine wires should be transformed by reheating as in the reference (1), because the size of the groove is as large as 3 to 5 .mu.m, it was impossible to fabricate fine wires with high density two dimensionally.
In addition, in the prior art fabricating method of a quantum wire shown in FIG. 20 recited in the reference (3), because a semiconductor layer to be a quantum wire is formed by crystal growth in a plane configuration, it is then processed into a fine wire configuration by etching and, thereafter the semiconductor layer of the fine wire configuration is buried by regrowth, there is a problem that the fine wires should be damaged by etching similarly as in the prior art fabricating method of a quantum wire recited in the reference (1). Further, there was a problem that the fine wires could be transformed by reheating during the regrowth.
In addition, in the prior art fabricating method of a quantum wire shown in FIG. 21 recited in the reference (3), V grooves are formed on a substrate with minute intervals employing an X-ray nanolithography technique, thereby forming an array of quantum wires. However, the size and interval of the quantum well wires are 15 nm/side and a period of 200 nm, which are not so fine.
In addition, in the prior art fabricating method of a quantum wire recited in the reference (4), a quantum wire finer than the aperture width of a mask pattern is formed utilizing the surface direction dependency of crystal growth. Then, the interval between quantum wires is limited by limitations in the fine patterning of a mask pattern, which interval is about 20 to 30 nm at present.
In the prior art fabricating method of a quantum wire recited in Japanese Published Patent Application No. Hei. 2-163928, a fine quantum wire finer than the mask pattern width is formed employing the ALE technique and the surface direction dependency of crystal growth. Because the quantum wires are formed between semiconductor layers which are crystalline grown in a triangular configuration cross section, it was difficult to obtain an array structure comprising quantum wires arranged at fine intervals.
In utilizing quantum wires for a semiconductor laser, in order to obtain an effect of enhancing the laser characteristics owing to a quantum wire, it is necessary to form wires having no processing damages and to form wires with high density by narrowing the intervals between wires. Because of the problems described above, however, there is actually no example which could confirm the enhancement of laser characteristics.
On the other hand, a diffraction grating of a DFB (distributed feedback) laser is usually formed by the same method as disclosed in the reference (1), i.e., by etching of a semiconductor layer to be a diffraction grating employing a resist pattern formed by interference exposure as a mask. Accordingly, the configuration of a diffraction grating is transformed due to the reheating while performing the regrowth as described with regard to the problems in the fabricating method of a quantum wire, whereby the DFB laser cannot be fabricated with high reproducibility. In addition, in order to produce a so called .lambda./4 shifted diffraction grating by this method, a method of performing two photolithography steps employing interference exposure and a method of subsequently depicting respective patterns by EB direct drawing have to be used to form a resist pattern, whereby a long time is required for the fabrication, resulting in a lowered throughput. Although in the DFB laser it is already proposed to change the height of a diffraction grating partially so as to adjust the light density distribution in the resonator length direction and suppress hole burning, this formation method of a diffraction grating can only form a diffraction grating of uniform height, and in order to change the height of a diffraction grating partially, a method such as etching partially in a separate process has to be employed.
In the prior art fabricating method of a DFB laser recited in Japanese Published Patent Application No. Hei. 3-16288, it is possible to determine the configuration of a diffraction grating only by the crystal growth conditions without depending on the etching processing, and a semiconductor laser element having a diffraction grating can be fabricated with high reproducibility. However, as for the formation of a .lambda./4 shifted diffraction grating and adjustment of light density distribution in the resonator length direction, it involves the same problem as in the fabricating method of a diffraction grating employing the method recited in the reference (1).